Gaurav Narang

Gaurav Narang is a Postdoctoral Research Scholar at Arizona State University (ASU), advised by Prof. Krishnendu Chakrabarty. He received his PhD in Computer Engineering from Washington State University (WSU) in 2025, advised by Prof Partha Pande and Prof Jana Doppa. During his PhD, he worked on several NSF- and SRC-funded projects, addressing challenges in dynamic resource management for Von Neumann and heterogeneous Compute-In-Memory (CIM) architectures. His collaborative research with Intel Labs received the Best Paper Award at the 28th ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED) in 2023.

Gaurav has been recognized with several awards, including the Outstanding Research Assistant of the Year from the Voiland College of Engineering and Architecture (VCEA), WSU, the Research Excellence Award from the Graduate and Professional Student Association (GPSA), WSU, the Harold and Dianna Frank Electrical Engineering Fellowship, and the Alfred Suksdorf Fellowship.

Prior to his PhD, Gaurav gained six years of industry experience. He worked as a Design Engineer II at Synopsys, India (2018–2021), and as a Senior Design Engineer at STMicroelectronics, India (2015–2018). His professional expertise includes RTL design, synthesis, static timing analysis, and clock domain crossing (CDC) for memory repair architectures and PHY test chip designs. Gaurav holds an M.Tech degree in Electronics and Communications Engineering from IIIT Delhi, earned in 2015.