Matthew Marinella

From 2010 to 2021, Matthew J. Marinella was with Sandia’s Microsystems S&T Center, where he was a Distinguished Member of the Technical Staff. At Sandia, Dr. Marinella led the Secure, Efficient, Extreme Environment Computing (SEEEC) Grand Challenge, the Nonvolatile Memory Technology Development Program, and several internal and externally funded research projects involving neuromorphic and low-power computing with emerging electronic devices. He has served in technical advising and leadership roles in various Lab- and DOE-level initiatives on next generation computing for government applications. Dr. Marinella has authored or co-authored over 100 peer reviewed publications with over 3600 citations, given numerous invited and contributed talks, and presented several short courses on these topics. He has served in technical advising and leadership roles in various Lab- and DOE-level initiatives on next generation computing for government applications and is a member of the SRC Decadal Plan Executive Committee, chairs the Emerging Memory Devices Section for the IRDS Roadmap Beyond CMOS Chapter, and serves on various technical program committees. Prior to starting at Sandia in 2010, he was as a Device Engineer in Microchip’s Technology Development Group